[PEDA] Thermal Impedance of Copper Areas
Brian Guralnick
vergent.tech at sympatico.ca
Fri Jul 28 11:32:24 CDT 2006
If you are trying to get that last little bit of extra thermal cooling, if
your PCB has multiple layers, flood fill the layers under the component with
coper. Also, if you can add a grid of pads around the component which may
be waved/filled with soldier, this can also help.
____________
Brian G.
----- Original Message -----
From: "Linden" <ldoyle at zener.net>
To: "Protel EDA Discussion List" <PEDA at techservinc.com>
Sent: Thursday, July 27, 2006 8:31 PM
Subject: Re: [PEDA] Thermal Impedance of Copper Areas
> To Brad and David,
>
> Thanks for the replies.
> The info you suggested was exactly what I was after.
>
> It would appear that utilising the PCB copper as a heatsink doesn't help
> greatly once you get above a certain area.
> I guess this is due to the low cross section available for conduction
> with 1oz. copper.
> Even so, it might afford sufficient improvement to help in my application.
>
> Thanks again,
>
> Linden
>
>
> Brad Velander wrote:
>> Linden,
>> You can also glean some tidbits of information from a number of Linear
>> Technology datasheets and application notes for their regulators. A
>> couple that I know contain some related information which may help you
>> are:
>> LT1763C, LT1963 or LT1175I.
>>
>> I know there was another LT regulator that had a fairly extensive section
>> on comparing relative thermal dissipations with varying copper areas, but
>> I could not find it at this time. Ooops it wasn't Linear Technologies I
>> was looking for, I just stumbled onto the one I was thinking of. It was
>> for the LM1117 device from National Semi. It shows varying copper areas
>> and patterns, showing the effects of varying the copper area and pattern
>> on dissipation.
>>
>> Sincerely,
>> Brad Velander
>> Senior PCB Designer
>> Northern Airborne Technology
>> #14 - 1925 Kirschner Road,
>> Kelowna, BC, V1Y 4N7.
>> tel (250) 763-2232 ext. 225
>> fax (250) 762-3374
>>
>>
>>
>> -----Original Message-----
>> From: Linden [mailto:ldoyle at zener.net]
>> Sent: Wednesday, July 26, 2006 5:25 PM
>> To: PEDA at techservinc.com
>> Subject: [PEDA] Thermal Impedance of Copper Areas
>>
>>
>> Greetings All,
>>
>> Can anyone direct me to information on the relationship between copper
>> area and thermal impedance for SMD devices?
>>
>> I have a D2PAK MOSFET that has a Thermal impedance of 40K/W junction to
>> ambient when mounted with a minimum of copper on the mounting tab..
>> I'd like to reduce this figure by adding a copper area (polygon or fill)
>> to the mounting tab.
>> The problem is I don't have a feel for how much copper is needed for a
>> particular reduction in thermal impedance.
>>
>>
>> Thanks in advance,
>>
>> Linden Doyle
>> Browse or Search Current Archives (2004-Current):
>> http://www.mail-archive.com/peda@techservinc.com
>>
>>
>>
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>
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>
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