[PEDA] pb short-circuit beetwen pad and internal plane with protel 99se

Abd ul-Rahman Lomax abd at lomaxdesign.com
Wed Jul 12 14:13:35 CDT 2006


At 11:37 AM 7/12/2006, d-fabbro wrote:
>I'm using protel 99se and for the third time since several years i have
>a serious problem
>a via or pad with a label attached is abnormally connected to internal
>plane!!!
>DRC is ok !!! and the via or pad being discussed is not visually in
>error ( color changing)

Serious question: how do you know it is abnormally connected? If you 
look at the gerber files, can you see that it is incorrect? (note 
that you'll need to look at the *Holes*). And remember that holes to 
be plated are generally drilled oversize and then plated back to the 
nominal size, so the copper plating on the wall of a hole will extend 
beyond where Protel thinks it will be, by the thickness of the 
plating. Plus, of course, the allowed variation in the hole size.

I assume from what you wrote that it is connected to a voltage plane. 
Is this a split plane? What is the net assigned to the plane and is 
the same net assigned to the pad or via (in which case it is 
correctly connected).

What are the pad or via parameters and what rules have you set that 
might affect how it is connected?

"With a label attached" is not clear to me. Do you mean a net 
assignment, or do you mean a pad name (vias can't be named)? Or do 
you mean something else?

Essentially, is Protel showing this pad or via as connected to the 
plane? Or are you only finding it connected in the photoplots or on 
the board itself?

Internal planes are calculated layers, they are generated from what 
is on other layers plus specified parameters, such as clearances, 
thermal reliefs, etc. So an abnormal connection typically means that 
you are feeding the wrong information to the photoplot routines; and, 
in this situation, you won't see DRC errors since Protel does not 
know that there is one. Mostly likely, it thinks you want to connect 
the pad or via to the plane. So the most common question you will 
need to answer is, "Why does Protel think this pad or via is to be 
connected? or otherwise plotted in such a way as to cause a connection?"




More information about the PEDA mailing list